+incdir+$RENA_HOME/hw/src/vsrc/CPU/RenaCoreV2
$CPU_HOME/RenaCoreV2/backend/exu.v
$CPU_HOME/RenaCoreV2/backend/fu/Dcache.v
$CPU_HOME/RenaCoreV2/backend/fu/DcacheHasMmio.v
$CPU_HOME/RenaCoreV2/backend/fu/alu.v
$CPU_HOME/RenaCoreV2/backend/fu/bru.v
$CPU_HOME/RenaCoreV2/backend/fu/clint.v
$CPU_HOME/RenaCoreV2/backend/fu/csrWriteBuffer.v
$CPU_HOME/RenaCoreV2/backend/fu/lsu.v
$CPU_HOME/RenaCoreV2/backend/idu.v
$CPU_HOME/RenaCoreV2/backend/isu.v
$CPU_HOME/RenaCoreV2/backend/regfile.v
$CPU_HOME/RenaCoreV2/backend/wbu.v
$CPU_HOME/RenaCoreV2/brunchAddressQueue.v
$CPU_HOME/RenaCoreV2/bus/rdAXI.v
$CPU_HOME/RenaCoreV2/bus/rdArbiter.v
$CPU_HOME/RenaCoreV2/bus/reqDispute.v
$CPU_HOME/RenaCoreV2/bus/user2AXI.v
$CPU_HOME/RenaCoreV2/bus/wrAXI.v
$CPU_HOME/RenaCoreV2/common/SRAM.v
$CPU_HOME/RenaCoreV2/controlStatusRegisiter.v
$CPU_HOME/RenaCoreV2/core.v
$CPU_HOME/RenaCoreV2/frontend/PipelineIcache.v
$CPU_HOME/RenaCoreV2/frontend/bht.v
$CPU_HOME/RenaCoreV2/frontend/btb.v
$CPU_HOME/RenaCoreV2/frontend/fronted.v
$CPU_HOME/RenaCoreV2/frontend/ifu.v
$CPU_HOME/RenaCoreV2/frontend/instrBuffer.v
$CPU_HOME/RenaCoreV2/frontend/instrScan.v
$CPU_HOME/RenaCoreV2/frontend/ras.v
$CPU_HOME/RenaCoreV2/mmu.v
$CPU_HOME/RenaCoreV2/pipelineControl.v
$CPU_HOME/RenaCoreV2/CPU.v
